310 lines
5.4 KiB
ArmAsm
310 lines
5.4 KiB
ArmAsm
; Assembly stub for the IDT
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bits 64
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extern interrupt_dispatch
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global interrupt_stub
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global vector_0_handler
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global vector_1_handler
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global vector_2_handler
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global vector_3_handler
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global vector_4_handler
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global vector_5_handler
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global vector_6_handler
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global vector_7_handler
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global vector_8_handler
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global vector_9_handler
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global vector_10_handler
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global vector_11_handler
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global vector_12_handler
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global vector_13_handler
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global vector_14_handler
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global vector_15_handler
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global vector_16_handler
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global vector_17_handler
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global vector_18_handler
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global vector_19_handler
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global vector_20_handler
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global vector_21_handler
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interrupt_stub:
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; We'll push all general-purpose registers to the stack,
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; so they're intact and don't bother the code that was
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; executed when the interrupt happened.
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; (except rsp because it will already be saved in the iret frame)
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push qword rax
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push qword rbx
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push qword rcx
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push qword rdx
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push qword rsi
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push qword rdi
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;push qword rsp
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push qword rbp
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push qword r8
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push qword r9
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push qword r10
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push qword r11
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push qword r12
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push qword r13
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push qword r14
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push qword r15
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; Put stack pointer as first argument of our function
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mov rdi, rsp
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call interrupt_dispatch
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; What the function returns (new stack pointer) is saved in rbp
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mov rsp, rax
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pop qword r15
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pop qword r14
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pop qword r13
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pop qword r12
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pop qword r11
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pop qword r10
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pop qword r9
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pop qword r8
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pop qword rbp
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;pop qword rsp
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pop qword rdi
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pop qword rsi
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pop qword rdx
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pop qword rcx
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pop qword rbx
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pop qword rax
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; Removing the error code and vector number so stack doesn't
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; get corrupted
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add rsp, 16
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; Restore ss, rsp, rflags, cs, rip of code that was executing
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; before the interrupt
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iretq
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; Vector handlers will be 16-byte aligned so that we can loop over them
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; like <vector_no> * 16 to get each one's address
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; Divide Error
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align 16
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vector_0_handler:
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; error code (nothing, so we push a dummy 0 quadword, 64bits/8bytes long)
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push qword 0
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; vector number (so our interrupt stub knows which one it is)
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push qword 0
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jmp interrupt_stub
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; Debug Exception
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align 16
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vector_1_handler:
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push qword 0
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push qword 1
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jmp interrupt_stub
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; NMI
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align 16
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vector_2_handler:
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push qword 0
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push qword 2
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jmp interrupt_stub
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; Breakpoint
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align 16
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vector_3_handler:
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push qword 0
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push qword 3
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jmp interrupt_stub
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; Overflow
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align 16
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vector_4_handler:
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push qword 0
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push qword 4
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jmp interrupt_stub
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; BOUND Range exceeded
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align 16
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vector_5_handler:
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push qword 0
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push qword 5
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jmp interrupt_stub
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; Invalid Opcode
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align 16
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vector_6_handler:
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push qword 0
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push qword 6
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jmp interrupt_stub
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; Device Not Available
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align 16
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vector_7_handler:
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push qword 0
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push qword 7
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jmp interrupt_stub
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; Double Fault
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align 16
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vector_8_handler:
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; No error code, we only push vector number
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push qword 1
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jmp interrupt_stub
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; Coprocessor Segment Overrun
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align 16
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vector_9_handler:
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push qword 9
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jmp interrupt_stub
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; Invalid TSS
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align 16
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vector_10_handler:
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push qword 10
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jmp interrupt_stub
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; Segment Not Present
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align 16
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vector_11_handler:
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push qword 11
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jmp interrupt_stub
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; Stack-Segment Fault
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align 16
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vector_12_handler:
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push qword 12
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jmp interrupt_stub
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; General Protection
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align 16
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vector_13_handler:
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push qword 13
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jmp interrupt_stub
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; Page Fault
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align 16
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vector_14_handler:
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push qword 14
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jmp interrupt_stub
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; Intel reserved
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align 16
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vector_15_handler:
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push qword 0
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push qword 15
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jmp interrupt_stub
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; x87 FPU Floating-Point Error
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align 16
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vector_16_handler:
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push qword 0
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push qword 16
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jmp interrupt_stub
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; Alignment Check
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align 16
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vector_17_handler:
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push qword 17
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jmp interrupt_stub
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; Machine Check
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align 16
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vector_18_handler:
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push qword 0
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push qword 18
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jmp interrupt_stub
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; SIMD Floating-Point Exception
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align 16
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vector_19_handler:
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push qword 0
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push qword 19
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jmp interrupt_stub
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; Virtualization Exception
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align 16
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vector_20_handler:
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push qword 0
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push qword 20
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jmp interrupt_stub
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; Control Protection Exception
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align 16
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vector_21_handler:
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push qword 21
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jmp interrupt_stub
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; The others are reserved (22->31) or external (32->255) interrupts
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align 16
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vector_22_handler:
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push qword 0
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push qword 22
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jmp interrupt_stub
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align 16
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vector_23_handler:
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push qword 0
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push qword 23
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jmp interrupt_stub
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align 16
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vector_24_handler:
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push qword 0
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push qword 24
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jmp interrupt_stub
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align 16
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vector_25_handler:
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push qword 0
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push qword 25
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jmp interrupt_stub
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align 16
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vector_26_handler:
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push qword 0
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push qword 26
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jmp interrupt_stub
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align 16
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vector_27_handler:
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push qword 0
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push qword 27
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jmp interrupt_stub
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align 16
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vector_28_handler:
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push qword 0
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push qword 28
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jmp interrupt_stub
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align 16
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vector_29_handler:
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push qword 0
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push qword 29
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jmp interrupt_stub
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align 16
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vector_30_handler:
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push qword 0
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push qword 30
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jmp interrupt_stub
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align 16
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vector_31_handler:
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push qword 0
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push qword 31
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jmp interrupt_stub
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; PIT timer
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align 16
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vector_32_handler:
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push qword 0
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push qword 32
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jmp interrupt_stub
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; PS/2 Keyboard
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align 16
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vector_33_handler:
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push qword 0
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push qword 33
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jmp interrupt_stub |