51 lines
1.4 KiB
C
51 lines
1.4 KiB
C
/*
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* @author xamidev <xamidev@riseup.net>
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* @brief x64 4-level paging implementation
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* @license GPL-3.0-only
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*/
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#ifndef PAGING_H
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#define PAGING_H
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#define PAGE_SIZE 4096
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#include <stdint.h>
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#include <limine.h>
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#include "mem/heap/kheap.h"
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void paging_init();
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void paging_map_page(uint64_t* root_table, uint64_t virt, uint64_t phys, uint64_t flags);
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// To swap root page tables
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void load_cr3(uint64_t value);
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extern uint64_t hhdm_off;
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#define PHYS_TO_VIRT(x) ((void*)((uintptr_t)(x) + hhdm_off))
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#define VIRT_TO_PHYS(x) ((uintptr_t)(x) - hhdm_off)
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#define PTE_ADDR_MASK 0x000FFFFFFFFFF000
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// Stole it
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#define ALIGN_UP(x, align) (((x) + ((align) - 1)) & ~((align) - 1))
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#define ALIGN_DOWN(x, align) ((x) & ~((align) - 1))
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#define PAGE_ALIGN_DOWN(x) ((x) & PTE_ADDR_MASK)
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#define ALIGN(size) ALIGN_UP(size, 16)
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#define BLOCK_MIN_SIZE (sizeof(struct heap_block_t) + 16)
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#define PML4_INDEX(x) (((x) >> 39) & 0x1FF)
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#define PDPT_INDEX(x) (((x) >> 30) & 0x1FF)
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#define PD_INDEX(x) (((x) >> 21) & 0x1FF)
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#define PT_INDEX(x) (((x) >> 12) & 0x1FF)
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// Page entry special bits
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// Bits set on a parent (directory, table) fall back to their children
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#define PTE_PRESENT (1ULL << 0)
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#define PTE_WRITABLE (1ULL << 1)
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#define PTE_USER (1ULL << 2)
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#define PTE_PWT (1ULL << 3)
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#define PTE_PCD (1ULL << 4)
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#define PTE_HUGE (1ULL << 7)
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#define PTE_NOEXEC (1ULL << 63)
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#endif |