Small kernel heap for VMM internals, kmalloc/kfree
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@@ -39,10 +39,14 @@ static uint64_t* alloc_page_table()
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return virt;
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}
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// Kernel paging root table, that will be placed in cr3
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__attribute__((aligned(4096)))
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static uint64_t *kernel_pml4;
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uint64_t *kernel_pml4;
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void map_page(uint64_t virt, uint64_t phys, uint64_t flags)
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// Will map a page ONLY according to the kernel_pml4 root table.
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// For kernel initialization/mapping only
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// Deprecated, will be removed
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/* void paging_kmap_page(uint64_t virt, uint64_t phys, uint64_t flags)
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{
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virt = PAGE_ALIGN_DOWN(virt);
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phys = PAGE_ALIGN_DOWN(phys);
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@@ -90,37 +94,87 @@ void map_page(uint64_t virt, uint64_t phys, uint64_t flags)
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// PT: finally, populate the page table entry
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pt[pt_i] = phys | flags | PTE_PRESENT;
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// Flush TLB (apply changes)
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invlpg((void *)virt);
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} */
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// Same as above, only this one takes any root table (not only kernel)
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// Duplicate code but don't worry about it, I'll refactor one day
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void paging_map_page(uint64_t* root_table, uint64_t virt, uint64_t phys, uint64_t flags)
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{
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virt = PAGE_ALIGN_DOWN(virt);
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phys = PAGE_ALIGN_DOWN(phys);
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// Translate the virt address into page table indexes
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uint64_t pml4_i = PML4_INDEX(virt);
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uint64_t pdpt_i = PDPT_INDEX(virt);
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uint64_t pd_i = PD_INDEX(virt);
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uint64_t pt_i = PT_INDEX(virt);
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uint64_t *pdpt, *pd, *pt;
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// PML4
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// If the entry at index is not present, allocate enough space for it
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// then populate the entry with correct addr + flags
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if (!(root_table[pml4_i] & PTE_PRESENT))
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{
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pdpt = alloc_page_table();
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root_table[pml4_i] = VIRT_TO_PHYS(pdpt) | PTE_PRESENT | PTE_WRITABLE;
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}
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else {
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pdpt = (uint64_t *)PHYS_TO_VIRT(root_table[pml4_i] & ~0xFFFULL);
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}
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// PDPT: same here
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if (!(pdpt[pdpt_i] & PTE_PRESENT))
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{
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pd = alloc_page_table();
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pdpt[pdpt_i] = VIRT_TO_PHYS(pd) | PTE_PRESENT | PTE_WRITABLE;
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}
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else {
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pd = (uint64_t *)PHYS_TO_VIRT(pdpt[pdpt_i] & ~0xFFFULL);
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}
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// PD: and here
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if (!(pd[pd_i] & PTE_PRESENT))
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{
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pt = alloc_page_table();
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pd[pd_i] = VIRT_TO_PHYS(pt) | PTE_PRESENT | PTE_WRITABLE;
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}
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else {
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pt = (uint64_t *)PHYS_TO_VIRT(pd[pd_i] & ~0xFFFULL);
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}
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// PT: finally, populate the page table entry
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pt[pt_i] = phys | flags | PTE_PRESENT;
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// Flush TLB (apply changes)
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invlpg((void *)virt);
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}
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uint64_t kernel_phys_base;
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uint64_t kernel_virt_base;
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void paging_init(struct limine_kernel_address_response* kaddr, struct limine_framebuffer* fb)
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{
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// We should map the kernel, GDT, IDT, stack, framebuffer.
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// Optionally we could map ACPI tables (we can find them in the Limine memmap)
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uint64_t kernel_phys_base = kaddr->physical_base;
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uint64_t kernel_virt_base = kaddr->virtual_base;
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kernel_phys_base = kaddr->physical_base;
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kernel_virt_base = kaddr->virtual_base;
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DEBUG("Kernel lives at virt=0x%p phys=0x%p", kernel_virt_base, kernel_phys_base);
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kernel_pml4 = alloc_page_table();
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// for debug
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uint64_t page_count = 0;
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// First 16 MB identity-mapped (phys = virt)
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// This is because there might be some leftover stuff in the lower phys addresses
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// from boot/bios/acpi/...
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for (uint64_t i=0; i<0x1000000; i += PAGE_SIZE)
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{
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map_page(i, i, PTE_WRITABLE);
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page_count++;
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}
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DEBUG("Mapped %u pages for the identity-mapping of the first 16 MB", page_count); page_count = 0;
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// HHDM map first 1 GB using given offset
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for (uint64_t i=0; i<0x40000000; i += PAGE_SIZE)
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{
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map_page(i+hhdm_off, i, PTE_WRITABLE);
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//paging_kmap_page(i+hhdm_off, i, PTE_WRITABLE);
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paging_map_page(kernel_pml4, i+hhdm_off, i, PTE_WRITABLE);
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page_count++;
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}
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DEBUG("Mapped %u pages for first 1GB (HHDM)", page_count); page_count = 0;
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@@ -131,7 +185,8 @@ void paging_init(struct limine_kernel_address_response* kaddr, struct limine_fra
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// For now who gives a shit, let's RWX all kernel
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for (uint64_t i = 0; i < KERNEL_SIZE; i += PAGE_SIZE)
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{
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map_page(kernel_virt_base+i, kernel_phys_base+i, PTE_WRITABLE);
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//paging_kmap_page(kernel_virt_base+i, kernel_phys_base+i, PTE_WRITABLE);
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paging_map_page(kernel_pml4, kernel_virt_base+i, kernel_phys_base+i, PTE_WRITABLE);
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page_count++;
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}
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DEBUG("Mapped %u pages for kernel", page_count); page_count = 0;
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@@ -145,7 +200,8 @@ void paging_init(struct limine_kernel_address_response* kaddr, struct limine_fra
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// Map the framebuffer (with cache-disable & write-through)
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for (uint64_t i=0; i<fb_pages; i++)
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{
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map_page(fb_virt+i*PAGE_SIZE, fb_phys+i*PAGE_SIZE, PTE_WRITABLE | PTE_PCD | PTE_PWT);
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//paging_kmap_page(fb_virt+i*PAGE_SIZE, fb_phys+i*PAGE_SIZE, PTE_WRITABLE | PTE_PCD | PTE_PWT);
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paging_map_page(kernel_pml4, fb_virt+i*PAGE_SIZE, fb_phys+i*PAGE_SIZE, PTE_WRITABLE | PTE_PCD | PTE_PWT);
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page_count++;
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}
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DEBUG("Mapped %u pages for framebuffer", page_count);
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