printf spinlock + remove DEPRECATED stuff + begin separating x86 stuff
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271
src/arch/x86/idt.c
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271
src/arch/x86/idt.c
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/*
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* @author xamidev <xamidev@riseup.net>
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* @brief Interrupt Descriptor Table setup and dispatching
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* @license GPL-3.0-only
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*/
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#include <arch/x86.h>
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#include <stdint.h>
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#include <stddef.h>
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#include <io/serial/serial.h>
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#include <io/kbd/ps2.h>
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#include <kernel.h>
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#include <stdbool.h>
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#include <sched/scheduler.h>
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#include <config.h>
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#include <sched/process.h>
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struct interrupt_descriptor idt[256];
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struct idtr idt_reg;
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// Address to our first interrupt handler
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extern char vector_0_handler[];
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// Timer ticks
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extern volatile uint64_t ticks;
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/*
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* idt_set_entry - Sets an Interrupt Descriptor Table entry
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* @vector: Vector number in the IDT
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* @handler: Pointer to the executable Interrupt Service Routine
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* @dpl: Desired privilege level
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*/
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void idt_set_entry(uint8_t vector, void* handler, uint8_t dpl)
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{
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uint64_t handler_addr = (uint64_t)handler;
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struct interrupt_descriptor* entry = &idt[vector];
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// Address is split in three parts so we right-shift progressively to get it all
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entry->address_low = handler_addr & 0xFFFF;
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entry->address_mid = (handler_addr >> 16) & 0xFFFF;
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entry->address_high = handler_addr >> 32;
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// Kernel code selector (as set in GDT)
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entry->selector = 0x8;
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// Interrupt gate, present, DPL (having: max DPL = 3)
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entry->flags = 0b1110 | ((dpl & 0b11) << 5) | (1 << 7);
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// We won't use IST for now
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entry->ist = 0;
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}
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/*
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* idt_load - Loads the Interrupt Descriptor Table
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* @idt_addr: Address to the IDT
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*/
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void idt_load(void* idt_addr)
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{
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// "limit" = "size" = Size of the IDT - 1 byte = (16*256)-1 = 0xFFF
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idt_reg.limit = 0xFFF;
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idt_reg.base = (uint64_t)idt_addr;
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asm volatile("lidt %0" :: "m"(idt_reg));
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}
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/*
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* idt_init - Initializes the Interrupt Descriptor Table
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*
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* Sets all IDT entries and their corresponding service routines,
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* then loads it.
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*/
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void idt_init()
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{
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for (size_t i=0; i<=KERNEL_IDT_ENTRIES; i++) {
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// Each vector handler is 16-byte aligned, so <vector_no>*16 = address of that handler
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idt_set_entry(i, vector_0_handler + (i*16), 0);
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}
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idt_load(&idt);
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DEBUG("IDT initialized");
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}
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/*
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* read_cr2 - Reads the CR2 register
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*
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* This function is useful because it gets the address
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* that the CPU tried to access in the case of a #PF.
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*
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* Return:
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* %val - CR2 register value
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*/
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static inline uint64_t read_cr2(void)
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{
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uint64_t val;
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asm volatile ("mov %%cr2, %0" : "=r"(val));
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return val;
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}
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/*
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* page_fault_handler - Handler for #PF
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* @ctx: CPU context
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*
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* Shows detail about a #PF, especially what instruction (RIP)
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* caused it, and what address access (CR2) caused it.
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* Also displays an interpretation of the thrown error code.
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* Then halts the system. We could implement demand paging later.
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*/
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static void page_fault_handler(struct cpu_status_t* ctx)
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{
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// It could be used to remap pages etc. to fix the fault, but right now what I'm more
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// interested in is getting more info out of those numbers cause i'm lost each time i have
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// to read all this mess
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uint64_t cr2 = read_cr2();
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DEBUG("\x1b[38;5;231mPage Fault at rip=0x%p, err=%u (%s%s%s%s%s%s%s%s) when accessing addr=0x%p\x1b[0m", ctx->iret_rip, ctx->error_code,
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CHECK_BIT(ctx->error_code, 0) ? "PAGE_PROTECTION_VIOLATION " : "PAGE_NOT_PRESENT ",
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CHECK_BIT(ctx->error_code, 1) ? "ON_WRITE " : "ON_READ ",
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CHECK_BIT(ctx->error_code, 2) ? "IN_USER_MODE" : "IN_KERNEL_MODE",
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CHECK_BIT(ctx->error_code, 3) ? " WAS_RESERVED" : "",
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CHECK_BIT(ctx->error_code, 4) ? " ON_INSTRUCTION_FETCH" : "",
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CHECK_BIT(ctx->error_code, 5) ? " PK_VIOLATION" : "",
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CHECK_BIT(ctx->error_code, 6) ? " ON_SHADOWSTACK_ACCESS" : "",
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CHECK_BIT(ctx->error_code, 7) ? " SGX_VIOLATION" : "",
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cr2);
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panic(ctx, "page fault");
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}
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/*
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* gp_fault_handler - Handler for #GP
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* @ctx: CPU context
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*
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* Shows detail about a General Protection Fault,
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* and what may have caused it. Halts the system.
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*/
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static void gp_fault_handler(struct cpu_status_t* ctx)
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{
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DEBUG("\x1b[38;5;231mGeneral Protection Fault at rip=0x%p, err=%u (%s)\x1b[0m",
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ctx->iret_rip,
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ctx->error_code,
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(ctx->error_code == 0) ? "NOT_SEGMENT_RELATED" : "SEGMENT_RELATED");
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// Segment-related
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if (ctx->error_code != 0) {
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bool is_external = CHECK_BIT(ctx->error_code, 0);
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// is it IDT, GDT, LDT?
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uint8_t table = ctx->error_code & 0x6; // 0b110 (isolate table)
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uint16_t index = ctx->error_code & 0xFFF8; // 13*1 1111111111111 + 000 = 1111111111111000
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char* table_names[4] = {"GDT", "IDT", "LDT", "IDT"};
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DEBUG("\x1b[38;5;231m%s in %s index %u\x1b[0m",
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is_external ? "EXTERNAL" : "INTERNAL",
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table_names[table],
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index);
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}
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panic(ctx, "gp fault");
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}
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// DEBUG
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void kbdproc_main(void* arg)
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{
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printf("Key pressed/released.\r\n");
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}
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/*
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* interrupt_dispatch - Interrupt dispatcher
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* @context: CPU context
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*
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* This function is where all interrupt routines go, after they passed
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* through their corresponding vector handler in the IDT assembly stub.
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* It catches all exceptions.
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*
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* Return:
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* <context> - CPU context after interrupt
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*/
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struct cpu_status_t* interrupt_dispatch(struct cpu_status_t* context)
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{
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if (context == NULL) {
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panic(NULL, "Interrupt dispatch recieved NULL context!");
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}
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switch(context->vector_number) {
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case 0:
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panic(context, "Divide Error");
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break;
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case 1:
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panic(context, "Debug Exception");
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break;
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case 2:
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panic(context, "NMI Interrupt");
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break;
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case 3:
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panic(context, "Breakpoint Interrupt");
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break;
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case 4:
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panic(context, "Overflow Trap");
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break;
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case 5:
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panic(context, "BOUND Range Exceeded");
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break;
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case 6:
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panic(context, "Invalid Opcode");
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break;
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case 7:
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panic(context, "Device Not Available");
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break;
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case 8:
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panic(context, "Double Fault");
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break;
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case 9:
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panic(context, "Coprocessor Segment Overrun");
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break;
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case 10:
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panic(context, "Invalid TSS");
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break;
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case 11:
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panic(context, "Segment Not Present");
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break;
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case 12:
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panic(context, "Stack-Segment Fault");
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break;
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case 13:
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gp_fault_handler(context);
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break;
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case 14:
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page_fault_handler(context);
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break;
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case 15:
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panic(context, "Intel Reserved Interrupt (Achievement unlocked: How Did We Get Here?)");
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break;
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case 16:
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panic(context, "x87 Floating-Point Error");
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break;
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case 17:
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panic(context, "Alignment Check Fault");
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break;
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case 18:
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panic(context, "Machine Check");
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break;
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case 19:
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panic(context, "SIMD Floating-Point Exception");
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break;
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case 20:
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panic(context, "Virtualization Exception");
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break;
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case 21:
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panic(context, "Control Protection Exception");
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break;
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case 32: // Timer Interrupt
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ticks++;
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// Send an EOI so that we can continue having interrupts
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outb(0x20, 0x20);
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if (ticks % SCHEDULER_QUANTUM == 0) {
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return scheduler_schedule(context);
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}
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break;
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case 33: // Keyboard Interrupt
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keyboard_handler();
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process_create("keyboard-initiated", kbdproc_main, NULL); // DEBUG
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outb(0x20, 0x20);
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break;
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default:
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DEBUG("Unexpected Interrupt");
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break;
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}
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return context;
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}
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