add: MUL, DIV instructions

assembler/das.c

@@ -106,6 +106,24 @@ void assemble(char* filename)
 			buffer[i++] = reg1_n;
 			buffer[i++] = reg2_n;
 		}
+		else if (strncmp(line, "MUL", 3) == 0)
+		{
+			sscanf(line, "%s %[^,], %s", instruction, reg1, reg2);	
+			int reg1_n = reg1[1] - '0';
+			int reg2_n = reg2[1] - '0';
+			buffer[i++] = MUL;
+			buffer[i++] = reg1_n;
+			buffer[i++] = reg2_n;
+		}
+		else if (strncmp(line, "DIV", 3) == 0)
+		{
+			sscanf(line, "%s %[^,], %s", instruction, reg1, reg2);	
+			int reg1_n = reg1[1] - '0';
+			int reg2_n = reg2[1] - '0';
+			buffer[i++] = DIV;
+			buffer[i++] = reg1_n;
+			buffer[i++] = reg2_n;
+		}
 		else if (strncmp(line, "OR", 3) == 0)
 		{
 			sscanf(line, "%s %[^,], %s", instruction, reg1, reg2);	

cpu.c

@@ -74,6 +74,16 @@ void cpu_exec(uint8_t opcode)
 			reg2 = cpu.memory[cpu.pc++];
 			cpu.reg[reg1] -= cpu.reg[reg2];
 			break;
+		case MUL:
+			reg1 = cpu.memory[cpu.pc++];
+			reg2 = cpu.memory[cpu.pc++];
+			cpu.reg[reg1] *= cpu.reg[reg2];
+			break;
+		case DIV:
+			reg1 = cpu.memory[cpu.pc++];
+			reg2 = cpu.memory[cpu.pc++];
+			cpu.reg[reg1] /= cpu.reg[reg2];
+			break;
 		case OR:
 			reg1 = cpu.memory[cpu.pc++];
 			reg2 = cpu.memory[cpu.pc++];
@@ -218,6 +228,8 @@ void mem_dump()
 		
 			case 0xb0:
 			case 0xb1:
+			case 0xb2:
+			case 0xb3:
 				printf("\e[43m%02x\e[0m ", cpu.memory[i]);
 				break;
 

cpu.h

@@ -23,6 +23,8 @@ typedef enum
 	// 0xB? -> Arithmetic operations
 	ADD 	= 0xB0,
 	SUB 	= 0xB1,
+	MUL	= 0xB2,
+	DIV	= 0xB3,
 
 	// 0xC? -> Bitwise operations
 	OR	= 0xC0,

examples/hello.asm

@@ -0,0 +1,48 @@
+; Hello, world!
+
+PUT R1, 72
+PUT R2, 101
+PUT R3, 108
+
+OUT R1
+OUT R2
+OUT R3
+OUT R3
+
+XOR R1, R1
+XOR R2, R2
+XOR R3, R3
+
+PUT R1, 111
+PUT R2, 44
+PUT R3, 32
+
+OUT R1
+OUT R2
+OUT R3
+
+XOR R1, R1
+XOR R2, R2
+XOR R3, R3
+
+PUT R1, 119
+PUT R2, 111
+PUT R3, 114
+
+OUT R1
+OUT R2
+OUT R3
+
+XOR R1, R1
+XOR R2, R2
+XOR R3, R3
+
+PUT R1, 108
+PUT R2, 100
+PUT R3, 33
+
+OUT R1
+OUT R2
+OUT R3
+
+HLT

program.asm

@@ -1,7 +1,6 @@
 ;this is a comment
 PUT R2, 5
-MOV R1, R2
+PUT R3, 2
-
+DIV R2, R3
-ADD R1, R2
 
 HLT